Comments on: Ampere Aims For The Clouds With Altra Arm Server Chip

By: Jeff D

Fri, 12 Feb 2021 19:32:28 +0000

Jacob is spot on. With so many different implementations of ARM cores where licensees are free to [not] implement optional instructions and then also have unique extensions, it makes it a nightmare for ISVs to support and they end up coding to the lowest common denominator potentially leaving a ton of headroom in performance on the table. Big name ISVs won’t optimize for you unless you throw a ton of money at them.

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By: Jacob Zelten

Thu, 05 Mar 2020 13:41:34 +0000

There’s still one thing that concerns me about the potential for ARM servers either in the public cloud or the datacenter: the need for a consistent server architecture, not just a standard CPU. If I build an application for Linux on x86 I can expect that it will run more or less equally well on any x86 vendor’s systems, and probably require only minimal changes between Linux distros. With an ARM server, is there an equivalent? Or do I have to design / optimize / test my application uniquely for different memory architectures, I/O designs, etc., on Ampere’s systems, AWS’s systems, ThunderX2-based systems… even assuming that the different ARM CPUs involved are instruction set compatible and I don’t have to recompile (or use RPLs for missing instructions) on every CPU?

Without that level of compatibility, it’s going to be tough to achieve critical mass for ARM servers as a target market, and therefore to attract software whether infrastructure (frameworks, libraries, …) or apps themselves.

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By: TinyBubblezNOPz

Wed, 04 Mar 2020 17:23:31 +0000

“simultaneous hyperthreading.”

Hyper-Threading is Intel’s marketing branding for Intel’s version of SMT(Simultaneous Multi-Threading) so please fix that. Now onto those 80 cores non SMT based cores is that the pipeline bubbles will become numerous if that branch perdition logic does not make the right choices as often as possible.

There is going to have to be a greater amount of time focused on code/compiler optimization in an effort to get around that having no SMT but for the workloads that can be better optimized for less unpredictability than that’s not as bad.

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