I have to concur, it’ll be great to get the lowdown on these Cheeky Olympian cut-and-paste CSS Neoverse V2 Demeter chips from the usual hyperscaler suspects! My file on them is a bit holey and in need of update … there’s the 2×48-core Graviton4 with 4×128-bit vector units, the 2×64-core Cobalt 100 (with vectors?), this here 1×72 or 2×36-core Axion (it seems; vectors?), and of course the 72-core Grace with 2x128b or 4x128b vectors (which is it though?). I guess their amount of L2 cache and number of memory channels vary, and they may not have HBM that might be found instead on their paired accelerators (Trainium2, Maia 100, Trillium TPU v6, Hopper/Blackwell).
So many details to be filled in … “Inquisition minds” …
P.S. The big table does show better Price/Peak Perf (in green) for TPU v6 than v1-V5, which is nice (in my understanding)!
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