Seems like a fair analysis to me. If electricity cost half as much or a tenth as much and process shrinks and packaging advancements slowed even more, we might be thinking about building more reconfigurable systems that could be in the field for ten years. I am thinking this might be one possible path forward. We can’t afford to be throwing $500 million to $1 billion machines away.

Had Intel made the API’s and tools to program those FPGA’s public they’d be worth money by now.
Best guess is anything like that was killed by internal power struggles and a fear of losing control.

Most comments above are correct, they are hard and expensive in time to work with but that’s an area where Open Source tends to be a win.

With great flexibility comes great responsibility (of course), but also great challenges in timing closure … One’s mileage likely varies but I could close at 48 MHz for a RISC-V on Lattice (with Yosys), but then less than 10 MHz for a pipleined ISA focused on symbolic processing … Hard blocks (ASICs) are definitely key for performance in computations that we know need to be performed (based on my verilog experimentations). But the FPGAs are great to delineate what is advantageous, or worthwhile, to implement in hardware vs software I think (eg. garbage collection would quite definitely remain a software process, for me).

Good points.

I just keep thinking if I was building an exascale machine that needed to last a decade, I would use FPGAs. Coding the hard blocks as the FPGA makers have had to do because of the size of their devices mititgates against absolute flexibility.

FPGA market is a wide as the CPU market, you find FPGA in all kind of sizes and prices. So FPGA can go all the way down to the embedded market (where you can go to very low power usage especially if you are using very few cells) as well as in other more compute intensive market segments.
But yes you are right FPGAs are mostly worthwhile if you are running inside units numbers that are up to a low 4-figures. Otherwise you might consider going to ASIC but ASIC development costs (not even including manufacturing) tends to be at least a low 6-figure number. So you can simply do the math what is the better options.

As comversome as VHDL it probably is still a lot easier / cheaper to find a FPGA developer than an ASIC designer.

“…Intel will continue its death march and Xeon group will be the last to turn off the lights.”

“Xeoff”?

I doubt that will happen with AMD. If you look at the quarterly results, it is Xilinx that is floating AMD’s boat last three quarters. AMD always has been a shitty business.

Intel’s Spring-cleaning AI going rogue (in the Fall)?